Freescale Semiconductor /MK24F12 /UART2 /CFIFO

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Interpret as CFIFO

7 43 0 0 00 0 0 0 0 0 0 0 0 (0)RXUFE 0 (0)TXOFE 0 (0)RXOFE 0 (0)RXFLUSH 0 (0)TXFLUSH

RXFLUSH=0, RXUFE=0, TXOFE=0, RXOFE=0, TXFLUSH=0

Description

UART FIFO Control Register

Fields

RXUFE

Receive FIFO Underflow Interrupt Enable

0 (0): RXUF flag does not generate an interrupt to the host.

1 (1): RXUF flag generates an interrupt to the host.

TXOFE

Transmit FIFO Overflow Interrupt Enable

0 (0): TXOF flag does not generate an interrupt to the host.

1 (1): TXOF flag generates an interrupt to the host.

RXOFE

Receive FIFO Overflow Interrupt Enable

0 (0): RXOF flag does not generate an interrupt to the host.

1 (1): RXOF flag generates an interrupt to the host.

RXFLUSH

Receive FIFO/Buffer Flush

0 (0): No flush operation occurs.

1 (1): All data in the receive FIFO/buffer is cleared out.

TXFLUSH

Transmit FIFO/Buffer Flush

0 (0): No flush operation occurs.

1 (1): All data in the transmit FIFO/Buffer is cleared out.

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